|(G. Skill Sniper RAM Sticks, Photo Courtesy of Google)|
- 8GB (4GB x2)
- DDR3-1600 (PC3 12800)
- 1.25 Volts
- 240-pin DIMM
Just to give you a short overview (based on my knowledge), CAS (Column Access Strobe) Latency or CL, refers to the time lag between the moment the memory controller signals the memory controller to access a specific area of data (usually called a memory column) on a RAM Memory Module. In layman's term, take your Memory Controller as a telephone and your RAM Memory Module as another telephone, your CAS Latency would be the number of rings it takes before someone on the other line picks up. These number of rings is referred to as a clock cycle. Now you might be wondering what "9-9-9-24" means, these numbers represent your Memory Timings and I will do my best to explain this as plainly as possible, so here it goes. To give you an example of how memory is organized, just look at it as a library. Books are arranged in rows and columns and the memory controller is the librarian. In order to get the book you want, the librarian needs the proper coordinates in order to reach that specific row and column in order to get the specific book you need.
This in order from left to right with 9-9-9-24 as an example:
1. tCL or CAS Latency- this is the time it takes the memory controller to send a signal to the RAM Memory Module to access a specific area of data. This is considered to be the most important of all the timings because it is the first step of accessing the Memory Modules. This will generally tell you how long the librarian will take to get the book you requested.
2. tRCD or Row Address Strobe (RAS) to Column Address Strobe (CAS) Delay- Once the memory controller sends the "coordinates" of the requested memory, this is the time it would take before it gets to the area of selected data. This will tell you how long it will take for the librarian to get to the book from a specified section of the library.
3. tRP or Row Precharge Time- Once the memory controller reaches the specified area of the requested memory, this is the time it will take to access that area of requested memory. This is the time it will take for the librarian to pick the book out of the shelf.
4. tRAS or Row Active Time- This is the number of cycles that a row has to remain active to ensure that the memory controller will have enough time to access the information that is in a specified area. This is the time that the librarian has to get to the area of the library where your book is located, pick that book out and bring it back to you before you get impatient and just leave the library.
|(G. Skill Sniper RAM, Photo Courtesy of Thomas Joseph C. Huang)|
Now that the final piece is in possession, it is time to put everything together. Stay tuned for Part 3 of this Getting My Nerd On series!
For Part 1, check it here: http://tomhuang03.blogspot.com/2012/06/getting-my-nerd-on-part-1.html
For Part 2, check it here: http://tomhuang03.blogspot.com/2012/06/getting-my-nerd-on-part-2.html
For Part 2.1, check it here: http://tomhuang03.blogspot.com/2012/07/getting-my-nerd-on-part-21.html
For Part 2.2, check it here: http://tomhuang03.blogspot.com/2012/07/getting-my-nerd-on-part-22.html
For Part 2.3, check it here: http://tomhuang03.blogspot.com/2012/07/getting-my-nerd-on-part-23.html
For Part 2.4, check it here: http://tomhuang03.blogspot.com/2012/08/getting-my-nerd-on-part-24.html